德州仪器SN65DSI83 mipi到LVDS桥将i.MX8M纳米MIPI-DSI信号转换为适合LVDS显示器的信号。
要使用此桥，请将S1.4微动开关设置为在．
内核配置
您可以通过以下内核配置选项管理SN65DSI83的支持:
TI SN65DSI83 MIPI DSI到LVDS桥（
CONFIG_DRM_I2C_SN65DSI83）
默认情况下，该选项作为内置选项启用ConnectCore 8M Nano内核配置文件．
内核驱动程序
SN65DSI83桥的驱动器位于:
| 文件 | 描述 |
|---|---|
SN65DSI83 MIPI-to-LVDS核心驱动 |
|
SN65DSI83 MIPI-to-LVDS桥接驱动器 |
设备树绑定和自定义
SN65DSI83桥在ConnectCore 8M纳米开发工具包器件树文件中定义。其中定义了两个LCD显示:
Auo 10.1" (g101evn01.0)
Fusion 10.1" (F10A-0102)
定义LVDS桥和LCD显示
ConnectCore 8M纳米开发工具包设备树
&i2c3 {clock-frequency = <100000>;pintrl -names = "default"， "gpio";pintrl -0 = <& pintrl_i2c3 >;pintrl -1 = <& pintrl_i2c3_gpio >;scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;状态= "ok ";Dsi_lvds_bridge: sn65dsi84@2c {compatible = "ti,sn65dsi83";Reg = <0x2c>;Ti,dsi-lanes = <4>; ti,lvds-format = <1>; ti,lvds-bpp = <24>; ti,width-mm = <217>; ti,height-mm = <136>; enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; interrupt-parent = <&gpio3>; interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds>; status = "disabled"; display-timings { native-mode = <&lvds0_g101evn010>; /* AUO G101EVN01.0 */ lvds0_g101evn010: timing@0 { clock-frequency = <69000000>; hactive = <1280>; vactive = <800>; hfront-porch = <120>; hback-porch = <1>; hsync-len = <8>; vback-porch = <10>; vfront-porch = <1>; vsync-len = <6>; hsync-active = <1>; vsync-active = <1>; de-active = <1>; pixelclk-active = <0>; }; /* Fusion 10" F10A-0102 */ lvds0_hsd101pfw2: timing@1 { clock-frequency = <45000000>; hactive = <1024>; vactive = <600>; hfront-porch = <120>; hback-porch = <1>; hsync-len = <8>; vback-porch = <10>; vfront-porch = <1>; vsync-len = <6>; hsync-active = <1>; vsync-active = <1>; de-active = <1>; pixelclk-active = <0>; }; }; port { dsi_lvds_bridge_in: endpoint { remote-endpoint = <&mipi_dsi_lvds_out>; }; }; }; ... }; ... &mipi_dsi { status = "okay"; ... port@2 { mipi_dsi_lvds_out: endpoint { remote-endpoint = <&dsi_lvds_bridge_in>; }; }; };IOMUX配置
下面的IOMUX条目配置相关的使能和中断GPIO引脚。
ConnectCore 8M纳米开发工具包设备树
pintrl_lvds: lvdsgrp {fsl,pins = < /* SN65DSI83 enable */ MX8MN_IOMUXC_NAND_ALE_GPIO3_IO0 0x19 /* SN65DSI83 interrupt */ MX8MN_IOMUXC_NAND_DATA00_GPIO3_IO6 0x19 >;}；将LVDS配置为默认桥接
Linux DRM子系统一次只允许使用一个MIPI桥。缺省情况下，LVDS桥没有开启，HDMI桥开启。在ConnectCore 8M Nano Development Kit上使用LVDS接口而不是HDMI接口:
禁用LT8912 MIPI-to-HDMI设备树中的桥接
启用SN65DSI83 MIPI-to-LVDS设备树中的桥接
Digi提供了预先编译的设备树覆盖，可以精确地做到这一点，这样您就可以测试LVDS接口，而无需重新编译设备树。要应用这些叠加之一，在U-Boot中运行以下命令:
启用具有AUO 10" LCD显示的LVDS:
= >设置overlays _ov_board_lvds_ccimx8m-dvk.dtbo启用LVDS与融合10“液晶显示器:
= >设置覆盖_ov_board_hsd101pfw2-lvds_ccimx8m-dvk.dtbo
看到设备树文件和覆盖了解更多信息。
